l l o o w w - - p p o o w w e e r r , , s s u u p p e e r r h h i i g g h h - - s s e e n n s s i i t t i i v v i i t t y y 1 1 . . 2 2 5 5 g g b b p p s s t t r r a a n n - - s s i i m m p p e e d d a a n n c c e e a a m m p p l l i i f f i i e e r r s s u u i i t t a a b b l l e e f f o o r r g g e e p p o o n n a a n n d d g g b b e e a a p p p p l l i i c c a a t t i i o o n n s s the m02016 is a transimpedance amplifier (tia) with auto- matic gain control (agc) manufactured in a sub-micron, cmos process. the agc allows more than 35 db of dynamic range, providing a low-cost solution for longer-reach 1.25 gbps gepon and gbe systems. for optimum system performance, the m02016 die should be mounted with a silicon or ingaas pin photodetector inside a lensed to-can or other optical sub-assembly. the m02016 reverse biases the pin by approximately 1.8 volts to optimise performance. a replica of the average photodiode current is available at the mon pad for align - ment and 'loss of signal' monitoring. t t r r a a n n s s i i m m p p e e d d a a n n c c e e a a m m p p l l i i f f i i e e r r ( ( t t i i a a ) ) the tia consists of a high gain single-ended cmos amplifier with a feedback resistor. the feedback creates a virtual earth low impedance at the input, and virtually all of the input current passes through the feedback resistor, defining the voltage at the output. advanced cmos design techniques are employed to maintain the stability of this stage across all input conditions. single-ended amplifiers have inherently poor power supply noise rejection. for this reason, an on-chip low dropout linear regulator has been incorporated into the design to give excellent noise rejection up to several mhz. higher frequency power supply noise is removed by the external 470 pf decoupling capacitor connected to pink. the circuit is designed for pin photodiodes in the grounded cathode configuration with the anode connected to the input of the tia and the cathode connected to ac ground, such as the provided pink terminal. reverse dc bias is applied to reduce the photodiode capacitance. avalanche photodiodes can be connected externally to a higher voltage. a a u u t t o o m m a a t t i i c c g g a a i i n n c c o o n n t t r r o o l l ( ( a a g g c c ) ) the m02016 has been designed to operate over the input range of +6 dbm to C29 dbm @ 1.25 gbps. this represents a ratio of 1:3000, whereas the acceptable dynamic range of the output is only 1:30 which implies a compression of 100:1 in the transimpedance. the design uses a mos transistor operating in the triode region as a voltage controlled resistor to achieve the transimpedance variation. > > typical -29 dbm sensitivity, +6 dbm saturation at 1.25 gbps > > typical differential transim- pedance: 24k w > > differential output > > operates with +3.3v supply > > monitor output > > agc provides dynamic range of more than 35 db > > k k e e y y f f e e a a t t u u r r e e s s 1 1 . . 2 2 5 5 g g b b p p s s t t r r a a n n s s i i m m p p e e d d a a n n c c e e a a m m p p l l i i f f i i e e r r w w i i t t h h a a g g c c m m 0 0 2 2 0 0 1 1 6 6
w w w w w w . . m m i i n n d d s s p p e e e e d d . . c c o o m m / / s s a a l l e e s s o o f f f f i i c c e e s s general information: (949) 579-3000 headquarters C newport beach 4000 macarthur blvd., east tower newport beach, ca 92660-3007 02016-BRF-001-A ?2005 mindspeed technologies, inc. all rights reserved. mindspeed and the mindspeed logo are trademarks of mindspeed technologies. all other trademarks are the prop - erty of their respective owners. although mindspeed technologies strives for accu- racy in all its publications, this material may contain errors or omissions and is subject to change without notice. this material is provided as is and without any express or implied warranties, including merchantability, fitness for a particular purpose and non-infringement. mindspeed technologies shall not be liable for any special, indirect, incidental or consequential damages as a result of its use. a a p p p p l l i i c c a a t t i i o o n n s s ? ftth gepon ? ftth gpon ? gigabit ethernet ? fiber channel o o r r d d e e r r i i n n g g i i n n f f o o r r m m a a t t i i o o n n ? m02016-3a: wafle pack (wp) ? m02016-qspbg: quarter wafer ? m02016-spbgf: whole wafer p p r r o o d d u u c c t t h h i i g g h h l l i i g g h h t t s s another feature of the agc is that it only operates on signals greater than C22 dbm (@ 0.9 a/w). this knee in the gain response is important when setting signal detect functions in the following post amplifier. it also aids in active photodiode alignment. the agc pad allows the agc to be disabled during photo- diode alignment by grounding the pad through a low imped- ance. the agc control voltage can be monitored during normal operation at this pad by a high impedance (>10 m w ) circuit. o o u u t t p p u u t t s s t t a a g g e e the signal from the tia enters a phase splitter followed by a dc-shift stage and a pair of voltage follower outputs. these are designed to drive a differential (100 w ) load. they are stable for driving capacitive loads, such as interstage filters. each output has its own gnd pad, all four gnd pads on the chip should be connected for proper operation. since the m02016 exhibits rapid roll-off (3 pole), simple external filtering is sufficient. m m o o n n i i t t o o r r o o / / p p high impedance o/p sinks replicate average photodiode current for monitoring purposes. m02016 block diagram recommended circuit vcc rm monitor output doutb dout pina pink 1 nf 470 pf dout dout mon agc pink pina dc shift phase spli t ter 1 v dc restore 2.6 v
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